Documentation Index
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System Architecture
The RISC Zero zkVM implements a sophisticated multi-layer proof system built on RISC-V instruction set emulation and zero-knowledge cryptography. This page explores the architecture from compilation through verification.High-Level Architecture
The zkVM architecture consists of several distinct layers:Compilation Layer
cargo risczero Tool
Thecargo risczero tool compiles user-written code into RISC-V ELF binaries deterministically. This ensures:
- Reproducible builds across different machines
- Consistent Image IDs for the same source code
- Compatibility with the zkVM execution environment
Memory Image
The compiled binary is loaded into aMemoryImage structure (defined in risc0_binfmt::MemoryImage) that represents:
- Program code and data
- Initial memory state
- Entry point for execution
The Image ID is computed using the
compute_image_id function from the risc0_binfmt crate, which creates a cryptographic digest of the memory image.Execution Layer
Executor Environment
TheExecutorEnv configures the guest execution environment, including:
- Input data streams
- Environment variables
- File descriptors (stdin, stdout, stderr)
- Segment limits
- Trace callbacks for debugging
risc0/zkvm/src/host/client/env.rs:
Session and Segments
Execution is divided into segments to manage memory and enable parallelization:- Session: Complete execution from start to finish
- Segment: A portion of execution (typically 2^20 to 2^24 cycles)
- SegmentRef: Reference to segment data for proof generation
- Memory efficiency: Prove large computations without loading all state
- Parallelization: Generate proofs for segments concurrently
- Incremental proving: Pause and resume execution
The segment size can be tuned with
segment_limit_po2() to balance memory usage and proving performance.Proving Layers
Layer 1: RISC-V Prover
The RISC-V Prover generates STARK proofs for individual execution segments. It proves:- Correct execution of RISC-V instructions
- Valid state transitions
- Proper memory access patterns
- Adherence to the RISC-V ISA specification
- Based on zk-STARK protocol
- 96 bits of security
- Quantum-safe (relies on hash functions, not elliptic curves)
- Targets perfect zero-knowledge
risc0/zkvm/src/lib.rs:100-118):
Layer 2: Recursion Prover
The Recursion Prover aggregates and composes proofs from the RISC-V Prover:- Lift: Convert RISC-V segment proofs to recursion circuit format
- Join: Combine multiple proofs into a single proof
- Resolve: Handle proof composition with assumptions
- Constant-size proofs regardless of execution length
- Proof composition (verifying proofs within the zkVM)
- Hiding execution length information
ALLOWED_CONTROL_ROOT aggregates all allowed control IDs.
The Recursion Prover achieves 99 bits of security and is also quantum-safe.
Layer 3: STARK-to-SNARK Prover
The STARK-to-SNARK Prover compresses STARK proofs into Groth16 SNARKs for efficient on-chain verification:- Verifies STARK proofs from the Recursion Prover
- Produces a Groth16 proof over the BN254 curve
- Optimized for Ethereum and EVM-compatible chains
- 99+ bits of security
- Not quantum-safe (relies on elliptic curve cryptography)
- Requires trusted setup ceremony (performed once)
Groth16Receipt structure (from risc0/zkvm/src/receipt/groth16.rs):
Receipt Structure
AReceipt is the final output of the proving process:
InnerReceipt enum supports multiple receipt types:
SegmentReceipt: Proof of a single segmentSuccinctReceipt: Recursively composed proofCompositeReceipt: Collection of receipts with assumptionsGroth16Receipt: SNARK proof for on-chain verificationFakeReceipt: Development mode placeholder (no actual proof)
Verification Architecture
VerifierContext
TheVerifierContext controls verification parameters:
- Seal integrity: Cryptographic proof is valid
- Image ID match: Correct code was executed
- Exit code: Guest exited successfully (code 0)
- Journal integrity: Output matches committed data
Hash Suites
The zkVM supports multiple hash functions for different use cases:- SHA-256: Standard hash for general use
- Poseidon2: STARK-friendly hash for circuits
- BLAKE2b: High-performance alternative
risc0/zkvm/src/receipt.rs:
Feature Flags
The zkVM supports several feature flags that control functionality:| Feature | Description |
|---|---|
client | Enables client API (executor, prover interfaces) |
prove | Enables the prover (incompatible with guest) |
cuda | CUDA GPU acceleration for proving |
metal | Metal GPU acceleration (macOS) |
std | Rust standard library support |
disable-dev-mode | Prevents fake proofs in production |
Performance Considerations
GPU Acceleration
The prover can leverage GPU acceleration:- CUDA: For NVIDIA GPUs
- Metal: For Apple Silicon (enabled by default on M-series chips)
Memory Management
Memory usage scales with:- Segment size (controlled by
segment_limit_po2) - Execution length
- Proof type (STARK vs SNARK)
Parallel Proving
Segments can be proven in parallel, leveraging multiple CPU cores or GPUs for improved throughput.Next Steps
- Guest and Host Programs - Learn the programming model
- Receipts and Verification - Understand proof verification
- Security Model - Explore cryptographic guarantees