Documentation Index
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risc0-circuit-recursion
Therisc0-circuit-recursion crate implements the recursion circuit used by RISC Zero to compress and compose proofs through recursive verification.
Installation
Overview
The recursion circuit is a specialized virtual machine optimized for algebraic operations, particularly STARK verification. It enables:- Proof Compression: Combine multiple segment proofs into one succinct proof
- Proof Composition: Verify receipts within proofs (compositional proving)
- Constant Size: Final proofs are constant size regardless of program complexity
This is a low-level circuit implementation. Most users should use
risc0-zkvm which handles recursion automatically.Feature Flags
Enables proof generation functionality.
- Implies:
std - Enables: Recursion prover, HAL implementations
Enables CUDA GPU acceleration.
- Implies:
prove
Enables Metal GPU acceleration (macOS).
- Implies:
prove
Enables dual CPU/GPU proving mode.
- Implies:
cuda
Enables standard library support.
Enables test utilities.
Constants
Valid power-of-2 range for lift operations.Range: 2^12 (4096) to 2^24 (16M) cycles
Register group for accumulator.
Register group for code.
Register group for data.
Circuit Implementation
The recursion circuit implementation.Implements constraint system for recursive STARK verification.
Global circuit instance.
Recursion Programs
The recursion VM runs specialized programs:Lift
Lift Program
Lift Program
Converts a segment receipt into a recursion receipt.
- Input: Segment receipt (RV32IM proof)
- Output: Lifted receipt (recursion proof)
- Purpose: Entry point for compression
Join
Join Program
Join Program
Combines two recursion receipts into one.
- Input: Two recursion receipts
- Output: Single joined receipt
- Purpose: Binary tree reduction
Resolve
Resolve Program
Resolve Program
Resolves assumptions in a receipt.
- Input: Receipt with assumptions, assumption receipts
- Output: Unconditional receipt
- Purpose: Compositional verification
Identity
Identity Program
Identity Program
Verifies a receipt without transformation.
- Input: Receipt
- Output: Verified receipt
- Purpose: Re-verification, format conversion
Control IDs
Control IDs for recursion programs.
Layout
Memory layout for recursion circuits.Defines register layouts, memory regions, and constraint system structure.
Proving (with prove feature)
Recursion proof generation.
Polynomial Extensions
Polynomial extension field operations.Optimized operations over extension fields used in FRI protocol.
Examples
Understanding Recursion Flow
Circuit Constants
Recursion VM Architecture
The recursion VM is optimized for:- Field Arithmetic: Baby Bear field operations
- Extension Fields: 4-element extension for FRI
- Poseidon2: Hash function for Merkle trees
- FRI Verification: STARK verification within STARK
Non-Turing-Complete
The recursion VM is intentionally non-Turing-complete:- No Loops: Only bounded iteration
- Predictable: All operations have known bounds
- Efficient: Optimized for algebraic constraints
Performance
Recursion performance characteristics:| Operation | Cycles | Time (CPU) | Time (GPU) |
|---|---|---|---|
| Lift | ~1M | ~1s | ~100ms |
| Join | ~1M | ~1s | ~100ms |
| Resolve | ~1M | ~1s | ~100ms |
Actual times vary based on hardware and proof size.
Memory Layout
Register groups organize circuit state:- Accum (Group 0): Accumulator registers
- Code (Group 1): Instruction/control registers
- Data (Group 2): Data registers
Taps
Register tap definitions.Defines which registers are accessible at which cycle offsets.
Info
Circuit information and metadata.Provides details about circuit size, layout, and capabilities.
GPU Acceleration
The recursion circuit benefits significantly from GPU acceleration:CUDA
With CUDA enabled:- 10-100x faster than CPU
- Parallel field operations
- Optimized FFT implementation
Metal
On Apple Silicon:- Automatic detection and use
- Optimized for M-series chips
- Energy efficient
Debugging
Enable test utilities for debugging:Security Considerations
The recursion circuit maintains the security properties of the base STARK:- Soundness: Inherited from base proof system
- Zero-Knowledge: Proofs reveal nothing about execution
- Compression: Constant size regardless of input